[PATCH 15/16] Add device tree for Ebony

Segher Boessenkool segher at kernel.crashing.org
Thu Feb 15 11:31:36 EST 2007


>>> No, they are cascaded in hardware.  I think having UIC1 under UCI0 
>>> is a
>>> correct representation.
>>
>> Only the interrupt routing is cascaded AFAICS, and
>> there is a separate interrupt tree to express that.
>
> In the case of the UICs, I don't see that there's anything "only"
> about the interrupt routing.  They're DCR controlled, and are not on
> the normal bus.

Yes.  UIC1 is not addressed via UIC0, and as such should
not be a child of it; it should be a direct child of its DCR
controller, just like UIC0.

The interrupt cascading should be expressed using the
interrupt mapping mechanism, which was designed expressly
for this purpose.


Segher




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