<br><font size=2 face="sans-serif">For reference, the 2.6.3 bring-up kernel
always issued global TLBIE. This was a hack, and we very much wanted
to improve performance if possible, particularly for the vast majority
of PPC applications out there that don't use SPEs.</font>
<br>
<br><font size=2 face="sans-serif">As long as we are thinking about a proper
solution, the whole mm->cpu_vm_mask thing is broken, at least as a selector
for local -vs- global TLBIE. The problem, as I see it, is that memory
regions can shared among processes (via mmap/shmat), with each task bound
to different processors. If we are to continue using a cpumask as
selector for TLBIE, then we really need a vma->cpu_vma_mask. </font>
<br><font size=2 face="sans-serif"> </font>
<br><font size=2 face="sans-serif">---<br>
Mark Nutter<br>
STI Design Center / IBM<br>
email: mnutter@us.ibm.com<br>
voice: 512-838-1612<br>
fax: 512-838-1927<br>
11400 Burnet Road<br>
Mail Stop 906/3003B<br>
Austin, TX 78758<br>
</font>
<br>
<br>
<br>
<table width=100%>
<tr valign=top>
<td>
<td><font size=1 face="sans-serif"><b>Arnd Bergmann <arnd@arndb.de></b></font>
<p><font size=1 face="sans-serif">10/12/2005 01:03 PM</font>
<td><font size=1 face="Arial"> </font>
<br><font size=1 face="sans-serif"> To:
linuxppc64-dev@ozlabs.org, linux-mm@kvack.org</font>
<br><font size=1 face="sans-serif"> cc:
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>, Mark Nutter/Austin/IBM@IBMUS,
Michael Day/Austin/IBM@IBMUS, Ulrich Weigand <Ulrich.Weigand@de.ibm.com></font>
<br><font size=1 face="sans-serif"> Subject:
ppc64/cell: local TLB flush with active
SPEs</font></table>
<br>
<br>
<br><font size=2><tt>I'm looking for a clean solution to detect the need
for global<br>
TLB flush when an mm_struct is only used on one logical PowerPC<br>
CPU (PPE) and also mapped with the memory flow controller of an<br>
SPE on the Cell CPU.<br>
<br>
Normally, we set bits in mm_struct:cpu_vm_mask for each CPU that<br>
accesses the mm and then do global flushes instead of local flushes<br>
when CPUs other than the currently running one are marked as used<br>
in that mask. When an SPE does DMA to that mm, it also gets local<br>
TLB entries that are only flushed with a global tlbie broadcast.<br>
<br>
The current hack is to always set cpu_vm_mask to all bits set<br>
when we map an mm into an SPE to ensure receiving the broadcast,<br>
but that is obviously not how it's meant to be used. In particular,<br>
it doesn't work in UP configurations where the cpumask contains<br>
only one bit.<br>
<br>
One solution that might be better could be to introduce a new special<br>
flag in addition to cpu_vm_mask for this purpose. We already have<br>
a bit field in mm_struct for dumpable, so adding another bit there<br>
at least does not waste space for other platforms, and it's likely<br>
to be in the same cache line as cpu_vm_mask. However, I'm reluctant<br>
to add more bit fields to such a prominent place, because it might<br>
encourage other people to add more bit fields or thing that they<br>
are accepted coding practice.<br>
<br>
Another idea would be to add a new field to mm_context_t, so it stays<br>
in the architecture specific code. Again, adding an int here does<br>
not waste space because there is currently padding in that place on<br>
ppc64.<br>
<br>
Or maybe there is a completely different solution.<br>
<br>
Suggestions?<br>
<br>
Arnd <><<br>
</tt></font>
<br>