--- 1.4/include/asm-ppc64/eeh.h	Tue Nov 26 10:38:01 2002
+++ 1.4.1.1/include/asm-ppc64/eeh.h	Mon Jun 16 14:11:19 2003
@@ -82,8 +82,10 @@
 /* #define EEH_POSSIBLE_IO_ERROR(val) (~(val) == 0) */
 /* #define EEH_POSSIBLE_ERROR(addr, vaddr, val) ((vaddr) != (addr) && EEH_POSSIBLE_IO_ERROR(val) */
 /* This version is rearranged to collect some profiling data */
-#define EEH_POSSIBLE_IO_ERROR(val) (~(val) == 0 && ++eeh_total_mmio_ffs)
-#define EEH_POSSIBLE_ERROR(addr, vaddr, val) (EEH_POSSIBLE_IO_ERROR(val) && (vaddr) != (addr))
+#define EEH_POSSIBLE_IO_ERROR(val, type)				\
+		((val) == (type)~0 && ++eeh_total_mmio_ffs)
+#define EEH_POSSIBLE_ERROR(addr, vaddr, val, type)			\
+		(EEH_POSSIBLE_IO_ERROR(val, type) && (vaddr) != (addr))

 /*
  * MMIO read/write operations with EEH support.
@@ -102,7 +104,7 @@
 static inline u8 eeh_readb(void *addr) {
 	volatile u8 *vaddr = (volatile u8 *)IO_TOKEN_TO_ADDR(addr);
 	u8 val = in_8(vaddr);
-	if (EEH_POSSIBLE_ERROR(addr, vaddr, val))
+	if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u8))
 		return eeh_check_failure(addr, val);
 	return val;
 }
@@ -113,7 +115,7 @@
 static inline u16 eeh_readw(void *addr) {
 	volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
 	u16 val = in_le16(vaddr);
-	if (EEH_POSSIBLE_ERROR(addr, vaddr, val))
+	if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16))
 		return eeh_check_failure(addr, val);
 	return val;
 }
@@ -121,10 +123,21 @@
 	volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
 	out_le16(vaddr, val);
 }
+static inline u16 eeh_raw_readw(void *addr) {
+       volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
+       u16 val = in_be16(vaddr);
+       if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u16))
+               return eeh_check_failure(addr, val);
+       return val;
+}
+static inline void eeh_raw_writew(u16 val, void *addr) {
+       volatile u16 *vaddr = (volatile u16 *)IO_TOKEN_TO_ADDR(addr);
+       out_be16(vaddr, val);
+}
 static inline u32 eeh_readl(void *addr) {
 	volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
 	u32 val = in_le32(vaddr);
-	if (EEH_POSSIBLE_ERROR(addr, vaddr, val))
+	if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32))
 		return eeh_check_failure(addr, val);
 	return val;
 }
@@ -132,6 +145,17 @@
 	volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
 	out_le32(vaddr, val);
 }
+static inline u32 eeh_raw_readl(void *addr) {
+       volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
+       u32 val = in_be32(vaddr);
+       if (EEH_POSSIBLE_ERROR(addr, vaddr, val, u32))
+               return eeh_check_failure(addr, val);
+       return val;
+}
+static inline void eeh_raw_writel(u32 val, void *addr) {
+       volatile u32 *vaddr = (volatile u32 *)IO_TOKEN_TO_ADDR(addr);
+       out_be32(vaddr, val);
+}

 static inline void eeh_memset_io(void *addr, int c, unsigned long n) {
 	void *vaddr = (void *)IO_TOKEN_TO_ADDR(addr);
@@ -159,7 +183,7 @@
 	if (_IO_IS_ISA(port) && !_IO_HAS_ISA_BUS)
 		return ~0;
 	val = in_8((u8 *)(port+pci_io_base));
-	if (!_IO_IS_ISA(port) && EEH_POSSIBLE_IO_ERROR(val))
+	if (!_IO_IS_ISA(port) && EEH_POSSIBLE_IO_ERROR(val, u8))
 		return eeh_check_failure((void*)(port+pci_io_base), val);
 	return val;
 }
@@ -174,7 +198,7 @@
 	if (_IO_IS_ISA(port) && !_IO_HAS_ISA_BUS)
 		return ~0;
 	val = in_le16((u16 *)(port+pci_io_base));
-	if (!_IO_IS_ISA(port) && EEH_POSSIBLE_IO_ERROR(val))
+	if (!_IO_IS_ISA(port) && EEH_POSSIBLE_IO_ERROR(val, u16))
 		return eeh_check_failure((void*)(port+pci_io_base), val);
 	return val;
 }
@@ -189,7 +213,7 @@
 	if (_IO_IS_ISA(port) && !_IO_HAS_ISA_BUS)
 		return ~0;
 	val = in_le32((u32 *)(port+pci_io_base));
-	if (!_IO_IS_ISA(port) && EEH_POSSIBLE_IO_ERROR(val))
+	if (!_IO_IS_ISA(port) && EEH_POSSIBLE_IO_ERROR(val, u32))
 		return eeh_check_failure((void*)(port+pci_io_base), val);
 	return val;
 }