<html><head><style type="text/css"><!-- DIV {margin:0px;} --></style></head><body><div style="font-family:times new roman, new york, times, serif;font-size:12pt"><div>Hi Marco,<br><br>thanks for your feedback.<br><br>I tried out your suggestion of using an offset address instead of an absolute address in the dts, but that did not help.<br>I am still getting the error:<br><br>LK_DEBUG: gpio.c : of_get_gpio : /localbus/upm@1,0: gpio controller /soc8349@e0000000/gpio-controller@c00: is not registered<br><br>thanks<br>LK<br><br></div><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;"><br><div style="font-family: arial,helvetica,sans-serif; font-size: 12pt;">----- Original Message ----<br>From: Marco Stornelli <marco.stornelli@coritel.it><br>To: Laxmikant Rashinkar <lk.atwork@yahoo.com><br>Cc: linuxppc-embedded@ozlabs.org<br>Sent: Monday, September 1, 2008 11:39:05 PM<br>Subject: Re: need help with GPIO<br><br>
Laxmikant Rashinkar ha scritto:<br>> Hi,<br>> <br>> I have a MPC8347 based embedded PC running Linux 2.6.27.<br>> I am trying to access a NAND device connected to the LBC and UPM.<br>> The Ready/Busy* pin of the NAND device is connected to the built in GPIO-1 on pin 4 (input).<br>> <br>> When I try to access the NAND device, the function of_get_gpio() from drivers/of/gpio.c gets called, and<br>> it reports that my GPIO is not registered. Here are the actual debug messages:<br>> <br>> LK_DEBUG: gpio.c : of_get_gpio : name=upm type=<NULL> index=0<br>> LK_DEBUG: gpio.c : of_get_gpio : got property<br>> LK_DEBUG: gpio.c : of_get_gpio : nr_cell=3<br>> LK_DEBUG: gpio.c : of_get_gpio : gc.name=gpio-controller gc.type=<NULL> gc->Data=0x0<br>> LK_DEBUG: gpio.c : of_get_gpio : /localbus/upm@1,0: gpio controller /soc8349@e0000000/gpio-controller@e0000c00: is not registered<br>> <br>> When I check in
/proc/device-tree/soc8349@e0000000/, I find that entries are present for both GPIOs are present.<br>> <br>> Here are debug registration messages, indicating that gpio registered successfully:<br>> <br>> ##### LK_DEBUG: of_plat_dev_create : NAME=soc8349<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=wdt<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=i2c<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=i2c<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=spi<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=dma<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=usb<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=usb<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=mdio<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=ethernet<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=ethernet<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=serial<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=serial<br>> ##### LK_DEBUG:
of_plat_dev_create : NAME=crypto<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=pic<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=gpio-controller<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=gpio-controller<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=localbus<br>> ##### LK_DEBUG: of_plat_dev_create : NAME=upm<br>> <br>> Most probably something is wrong in my device tree (listed below). Can someone please point me in the right direction?<br>> <br>> thanks a lot for your help.<br>> LK<br>> <br>> -------------------------------------------------------------<br>> <br>> /*<br>> * MPC8349E MDS Device Tree Source<br>> *<br>> * Copyright 2005, 2006 Freescale Semiconductor Inc.<br>> *<br>> * This program is free software; you can redistribute it and/or modify it<br>> * under the terms of the GNU General Public License as published by
the<br>> * Free Software Foundation; either version 2 of the License, or (at your<br>> * option) any later version.<br>> */<br>> <br>> /dts-v1/;<br>> <br>> / {<br>> model = "MPC8349EMDS";<br>> compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> <br>> aliases {<br>> ethernet0 = &enet0;<br>> ethernet1 = &enet1;<br>> serial0 = &serial0;<br>> serial1 = &serial1;<br>> pci0 =
&pci0;<br>> pci1 = &pci1;<br>> };<br>> <br>> cpus {<br>> #address-cells = <1>;<br>> #size-cells = <0>;<br>> <br>> PowerPC,8349@0 {<br>> device_type = "cpu";<br>> reg = <0x0>;<br>> d-cache-line-size = <32>;<br>> i-cache-line-size = <32>;<br>>
d-cache-size = <32768>;<br>> i-cache-size = <32768>;<br>> timebase-frequency = <0>; // from bootloader<br>> bus-frequency = <0>; // from bootloader<br>> clock-frequency = <0>; // from bootloader<br>> };<br>> };<br>> <br>> memory {<br>> device_type =
"memory";<br>> reg = <0x00000000 0x10000000>; // 256MB at 0<br>> };<br>> <br>> bcsr@e2400000 {<br>> device_type = "board-control";<br>> reg = <0xe2400000 0x8000>;<br>> };<br>> <br>> soc8349@e0000000 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> device_type = "soc";<br>> compatible = "simple-bus";<br>> ranges = <0x0
0xe0000000 0x00100000>;<br>> reg = <0xe0000000 0x00000200>;<br>> bus-frequency = <0>;<br>> <br>> wdt@200 {<br>> device_type = "watchdog";<br>> compatible = "mpc83xx_wdt";<br>> reg = <0x200 0x100>;<br>> };<br>> <br>> i2c@3000 {<br>> #address-cells = <1>;<br>>
#size-cells = <0>;<br>> cell-index = <0>;<br>> compatible = "fsl-i2c";<br>> reg = <0x3000 0x100>;<br>> interrupts = <14 0x8>;<br>> interrupt-parent = <&ipic>;<br>> dfsrr;<br>> <br>> rtc@68 {<br>>
compatible = "dallas,ds1374";<br>> reg = <0x68>;<br>> };<br>> };<br>> <br>> i2c@3100 {<br>> #address-cells = <1>;<br>> #size-cells = <0>;<br>> cell-index = <1>;<br>> compatible = "fsl-i2c";<br>>
reg = <0x3100 0x100>;<br>> interrupts = <15 0x8>;<br>> interrupt-parent = <&ipic>;<br>> dfsrr;<br>> };<br>> <br>> spi@7000 {<br>> cell-index = <0>;<br>> compatible = "fsl,spi";<br>> reg = <0x7000 0x1000>;<br>>
interrupts = <16 0x8>;<br>> interrupt-parent = <&ipic>;<br>> mode = "cpu";<br>> };<br>> <br>> dma@82a8 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "fsl,mpc8349-dma", "fsl,elo-dma";<br>> reg =
<0x82a8 4>;<br>> ranges = <0 0x8100 0x1a8>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <71 8>;<br>> cell-index = <0>;<br>> dma-channel@0 {<br>> compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";<br>> reg = <0 0x80>;<br>>
interrupt-parent = <&ipic>;<br>> interrupts = <71 8>;<br>> };<br>> dma-channel@80 {<br>> compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";<br>> reg = <0x80 0x80>;<br>> interrupt-parent =
<&ipic>;<br>> interrupts = <71 8>;<br>> };<br>> dma-channel@100 {<br>> compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";<br>> reg = <0x100 0x80>;<br>> interrupt-parent = <&ipic>;<br>>
interrupts = <71 8>;<br>> };<br>> dma-channel@180 {<br>> compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";<br>> reg = <0x180 0x28>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <71 8>;<br>>
};<br>> };<br>> <br>> /* phy type (ULPI or SERIAL) are only types supported for MPH */<br>> /* port = 0 or 1 */<br>> usb@22000 {<br>> compatible = "fsl-usb2-mph";<br>> reg = <0x22000 0x1000>;<br>> #address-cells = <1>;<br>> #size-cells = <0>;<br>> interrupt-parent =
<&ipic>;<br>> interrupts = <39 0x8>;<br>> phy_type = "ulpi";<br>> port1;<br>> };<br>> /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */<br>> usb@23000 {<br>> compatible = "fsl-usb2-dr";<br>> reg = <0x23000 0x1000>;<br>> #address-cells =
<1>;<br>> #size-cells = <0>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <38 0x8>;<br>> dr_mode = "otg";<br>> phy_type = "ulpi";<br>> };<br>> <br>> mdio@24520 {<br>> #address-cells = <1>;<br>>
#size-cells = <0>;<br>> compatible = "fsl,gianfar-mdio";<br>> reg = <0x24520 0x20>;<br>> <br>> phy0: ethernet-phy@0 {<br>> interrupt-parent = <&ipic>;<br>> interrupts = <17 0x8>;<br>> reg = <0x1>;<br>>
device_type = "ethernet-phy";<br>> };<br>> phy1: ethernet-phy@1 {<br>> interrupt-parent = <&ipic>;<br>> interrupts = <18 0x8>;<br>> reg = <0x2>;<br>> device_type = "ethernet-phy";<br>> };<br>>
};<br>> <br>> enet0: ethernet@24000 {<br>> cell-index = <0>;<br>> device_type = "network";<br>> model = "TSEC";<br>> compatible = "gianfar";<br>> reg = <0x24000 0x1000>;<br>> local-mac-address = [ 00 00 00 00 00 00 ];<br>> interrupts = <32 0x8 33 0x8
34 0x8>;<br>> interrupt-parent = <&ipic>;<br>> phy-handle = <&phy0>;<br>> linux,network-index = <0>;<br>> };<br>> <br>> enet1: ethernet@25000 {<br>> cell-index = <1>;<br>> device_type = "network";<br>> model = "TSEC";<br>>
compatible = "gianfar";<br>> reg = <0x25000 0x1000>;<br>> local-mac-address = [ 00 00 00 00 00 00 ];<br>> interrupts = <35 0x8 36 0x8 37 0x8>;<br>> interrupt-parent = <&ipic>;<br>> phy-handle = <&phy1>;<br>> linux,network-index = <1>;<br>> };<br>> <br>> serial0:
serial@4500 {<br>> cell-index = <0>;<br>> device_type = "serial";<br>> compatible = "ns16550";<br>> reg = <0x4500 0x100>;<br>> clock-frequency = <0>;<br>> interrupts = <9 0x8>;<br>> interrupt-parent = <&ipic>;<br>> };<br>> <br>>
serial1: serial@4600 {<br>> cell-index = <1>;<br>> device_type = "serial";<br>> compatible = "ns16550";<br>> reg = <0x4600 0x100>;<br>> clock-frequency = <0>;<br>> interrupts = <10 0x8>;<br>> interrupt-parent = <&ipic>;<br>> };<br>>
<br>> crypto@30000 {<br>> compatible = "fsl,sec2.0";<br>> reg = <0x30000 0x10000>;<br>> interrupts = <11 0x8>;<br>> interrupt-parent = <&ipic>;<br>> fsl,num-channels = <4>;<br>> fsl,channel-fifo-len = <24>;<br>> fsl,exec-units-mask = <0x7e>;<br>>
fsl,descriptor-types-mask = <0x01010ebf>;<br>> };<br>> <br>> /* IPIC<br>> * interrupts cell = <intr #, sense><br>> * sense values match linux IORESOURCE_IRQ_* defines:<br>> * sense == 8: Level, low assertion<br>> * sense == 2: Edge, high-to-low change<br>> */<br>> ipic: pic@700 {<br>>
interrupt-controller;<br>> #address-cells = <0>;<br>> #interrupt-cells = <2>;<br>> reg = <0x700 0x100>;<br>> device_type = "ipic";<br>> };<br>> <br><br>Here you are using absolute addresses but you should use an offset from <br>a base reg address, in your case e0000000.<br><br>> gpio1: gpio-controller@e0000c00 {<br> gpio1: gpio-controller@c00 {<br>>
#gpio-cells = <2>;<br>> compatible = "fsl,mpc8349-gpio-bank";<br> reg = <0xc00 0x100>;<br>> reg = <0xe0000c00 0x100>;<br>> gpio-controller;<br>> };<br>> <br> gpio2: gpio-controller@d00 {<br>> gpio2: gpio-controller@e0000d00 {<br>> #gpio-cells = <2>;<br>>
compatible = "fsl,mpc8349-gpio-bank";<br> reg = <0xd00 0x100>;<br>> reg = <0xe0000d00 0x100>;<br>> gpio-controller;<br>> };<br>> };<br>> <br>> localbus {<br>> compatible = "fsl,pq3-localbus", "simple-bus";<br>> #address-cells = <2>;<br>> #size-cells = <1>;<br>> reg =
<0xe0005000 0x100000>; // BRx, ORx, etc.<br>> <br>> upm@1,0 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "fsl,upm-nand";<br>> reg = <3 0xa0000000 0x800>;<br>> fsl,upm-addr-offset = <0x10>;<br>> fsl,upm-cmd-offset = <0x08>;<br>>
gpios = <&gpio1 4 0>;<br>> <br>> nand@0 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "fsl,lbc-nand";<br>> <br>> partition@0 {<br>> label = "EVERYTHING";<br>>
reg = <0x00000000 0x01000000>;<br>> };<br>> };<br>> };<br>> };<br>> <br>> pci0: pci@e0008500 {<br>> cell-index = <1>;<br>> interrupt-map-mask = <0xf800 0x0 0x0 0x7>;<br>> interrupt-map = <<br>> <br>> /* IDSEL 0x11 */<br>>
0x8800 0x0 0x0 0x1 &ipic 20 0x8<br>> 0x8800 0x0 0x0 0x2 &ipic 21 0x8<br>> 0x8800 0x0 0x0 0x3 &ipic 22 0x8<br>> 0x8800 0x0 0x0 0x4 &ipic 23 0x8<br>> <br>> /* IDSEL 0x12 */<br>> 0x9000 0x0 0x0 0x1 &ipic 22 0x8<br>>
0x9000 0x0 0x0 0x2 &ipic 23 0x8<br>> 0x9000 0x0 0x0 0x3 &ipic 20 0x8<br>> 0x9000 0x0 0x0 0x4 &ipic 21 0x8<br>> <br>> /* IDSEL 0x13 */<br>> 0x9800 0x0 0x0 0x1 &ipic 23 0x8<br>> 0x9800 0x0 0x0 0x2 &ipic 20 0x8<br>>
0x9800 0x0 0x0 0x3 &ipic 21 0x8<br>> 0x9800 0x0 0x0 0x4 &ipic 22 0x8<br>> <br>> /* IDSEL 0x15 */<br>> 0xa800 0x0 0x0 0x1 &ipic 20 0x8<br>> 0xa800 0x0 0x0 0x2 &ipic 21 0x8<br>> 0xa800 0x0 0x0 0x3 &ipic 22 0x8<br>>
0xa800 0x0 0x0 0x4 &ipic 23 0x8<br>> <br>> /* IDSEL 0x16 */<br>> 0xb000 0x0 0x0 0x1 &ipic 23 0x8<br>> 0xb000 0x0 0x0 0x2 &ipic 20 0x8<br>> 0xb000 0x0 0x0 0x3 &ipic 21 0x8<br>> 0xb000 0x0 0x0 0x4 &ipic 22 0x8<br>> <br>>
/* IDSEL 0x17 */<br>> 0xb800 0x0 0x0 0x1 &ipic 22 0x8<br>> 0xb800 0x0 0x0 0x2 &ipic 23 0x8<br>> 0xb800 0x0 0x0 0x3 &ipic 20 0x8<br>> 0xb800 0x0 0x0 0x4 &ipic 21 0x8<br>> <br>> /* IDSEL 0x18 */<br>>
0xc000 0x0 0x0 0x1 &ipic 21 0x8<br>> 0xc000 0x0 0x0 0x2 &ipic 22 0x8<br>> 0xc000 0x0 0x0 0x3 &ipic 23 0x8<br>> 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <66 0x8>;<br>> bus-range = <0 0>;<br>> ranges = <0x02000000 0x0
0x90000000 0x90000000 0x0 0x10000000<br>> 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000<br>> 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;<br>> clock-frequency = <66666666>;<br>> #interrupt-cells = <1>;<br>> #size-cells = <2>;<br>> #address-cells = <3>;<br>> reg = <0xe0008500 0x100>;<br>> compatible = "fsl,mpc8349-pci";<br>>
device_type = "pci";<br>> };<br>> <br>> pci1: pci@e0008600 {<br>> cell-index = <2>;<br>> interrupt-map-mask = <0xf800 0x0 0x0 0x7>;<br>> interrupt-map = <<br>> <br>> /* IDSEL 0x11 */<br>> 0x8800 0x0 0x0 0x1 &ipic 20 0x8<br>> 0x8800 0x0 0x0 0x2 &ipic 21 0x8<br>>
0x8800 0x0 0x0 0x3 &ipic 22 0x8<br>> 0x8800 0x0 0x0 0x4 &ipic 23 0x8<br>> <br>> /* IDSEL 0x12 */<br>> 0x9000 0x0 0x0 0x1 &ipic 22 0x8<br>> 0x9000 0x0 0x0 0x2 &ipic 23 0x8<br>> 0x9000 0x0 0x0 0x3 &ipic 20 0x8<br>>
0x9000 0x0 0x0 0x4 &ipic 21 0x8<br>> <br>> /* IDSEL 0x13 */<br>> 0x9800 0x0 0x0 0x1 &ipic 23 0x8<br>> 0x9800 0x0 0x0 0x2 &ipic 20 0x8<br>> 0x9800 0x0 0x0 0x3 &ipic 21 0x8<br>> 0x9800 0x0 0x0 0x4 &ipic 22 0x8<br>> <br>>
/* IDSEL 0x15 */<br>> 0xa800 0x0 0x0 0x1 &ipic 20 0x8<br>> 0xa800 0x0 0x0 0x2 &ipic 21 0x8<br>> 0xa800 0x0 0x0 0x3 &ipic 22 0x8<br>> 0xa800 0x0 0x0 0x4 &ipic 23 0x8<br>> <br>> /* IDSEL 0x16 */<br>>
0xb000 0x0 0x0 0x1 &ipic 23 0x8<br>> 0xb000 0x0 0x0 0x2 &ipic 20 0x8<br>> 0xb000 0x0 0x0 0x3 &ipic 21 0x8<br>> 0xb000 0x0 0x0 0x4 &ipic 22 0x8<br>> <br>> /* IDSEL 0x17 */<br>> 0xb800 0x0 0x0 0x1 &ipic 22 0x8<br>>
0xb800 0x0 0x0 0x2 &ipic 23 0x8<br>> 0xb800 0x0 0x0 0x3 &ipic 20 0x8<br>> 0xb800 0x0 0x0 0x4 &ipic 21 0x8<br>> <br>> /* IDSEL 0x18 */<br>> 0xc000 0x0 0x0 0x1 &ipic 21 0x8<br>> 0xc000 0x0 0x0 0x2 &ipic 22 0x8<br>> 0xc000 0x0
0x0 0x3 &ipic 23 0x8<br>> 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <67 0x8>;<br>> bus-range = <0 0>;<br>> ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000<br>> 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000<br>> 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;<br>>
clock-frequency = <66666666>;<br>> #interrupt-cells = <1>;<br>> #size-cells = <2>;<br>> #address-cells = <3>;<br>> reg = <0xe0008600 0x100>;<br>> compatible = "fsl,mpc8349-pci";<br>> device_type = "pci";<br>> };<br>> <br>> chosen {<br>> linux,stdout-path = &serial0;<br>> };<br>> };<br>> <br>> <br>> <br>> <br>> <br>>
------------------------------------------------------------------------<br>> <br>> _______________________________________________<br>> Linuxppc-embedded mailing list<br>> <a ymailto="mailto:Linuxppc-embedded@ozlabs.org" href="mailto:Linuxppc-embedded@ozlabs.org">Linuxppc-embedded@ozlabs.org</a><br>> <a href="https://ozlabs.org/mailman/listinfo/linuxppc-embedded" target="_blank">https://ozlabs.org/mailman/listinfo/linuxppc-embedded</a><br><br><br>-- <br>Marco Stornelli<br>Embedded Software Engineer<br>CoRiTeL - Consorzio di Ricerca sulle Telecomunicazioni<br><a href="http://www.coritel.it" target="_blank">http://www.coritel.it</a><br><br><a ymailto="mailto:marco.stornelli@coritel.it" href="mailto:marco.stornelli@coritel.it">marco.stornelli@coritel.it</a><br>+39 06 72582838<br></div></div></div><br>
</body></html>