<div>I use BDI to debug these two instructions. And here are the output of BDI just before the "rfi". The content of R6, R7 is different from SRR0(SPR26) and SRR1(SPR27).</div>
<div> </div>
<div><font size="2">
<p>cds8548>res run</p>
<p>- TARGET: processing user reset request</p>
<p>- BDI asserts HRESET</p>
<p>- Reset JTAG controller passed</p>
<p>- JTAG exists check passed</p>
<p>- IDCODE is 0x0003901D</p>
<p>- SVR is 0x80390011</p>
<p>- PVR is 0x80210010</p>
<p>- CCSRBAR is 0x0_ff700000</p>
<p>- BDI removes HRESET</p>
<p>- TARGET: Target PVR is 0x80210010</p>
<p>- TARGET: resetting target passed</p>
<p>cds8548>halt</p>
<p>Target CPU : MPC85xx (e500v2 rev.1)</p>
<p>Target state : halted</p>
<p>Debug entry cause : COP halt</p>
<p>Current PC : 0xfff82560</p>
<p>Current CR : 0x88000042</p>
<p>Current MSR : 0x00021200</p>
<p>Current LR : 0xfff8aa4c</p>
<p>Current CCSRBAR : 0x0_e0000000</p>
<p>cds8548>ci</p>
<p>cds8548>bi 0x0000015c</p>
<p>Breakpoint identification is 0</p>
<p>cds8548>go</p>
<p>- TARGET: stopped</p>
<p>cds8548>rd</p>
<p>GPR00: 00000000 0ffabd20 00000200 00000008</p>
<p>GPR04: 00000000 00000001 00000020 00000160</p>
<p>GPR08: 1f8b0808 00000148 0ffabace 0ffe08b0</p>
<p>GPR12: 00000006 764deddb 10000300 007fff00</p>
<p>GPR16: 00000001 ffffffff 007fff25 0ffff9d8</p>
<p>GPR20: 007ffeb0 00000000 0fffaa3c 0ffae490</p>
<p>GPR24: 00000000 00000003 02000040 007fff25</p>
<p>GPR28: 007fff00 0ffab3b8 0fcd6000 007ffeb0</p>
<p>CR : 24024022 MSR: 00021200</p>
<p>cds8548>rdspr 26</p>
<p>SPR 26 : 0xfff81300 - 519424</p>
<p>cds8548>rdspr 27</p>
<p>SPR 27 : 0x00001000 4096</p>
<p>cds8548></p></font><br><br> </div><br><br>
<div><span class="gmail_quote">On 8/14/07, <b class="gmail_sendername">Andy Fleming</b> <<a href="mailto:afleming@freescale.com">afleming@freescale.com</a>> wrote:</span>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0px 0px 0px 0.8ex; BORDER-LEFT: #ccc 1px solid"><br>On Aug 14, 2007, at 15:21, mike zheng wrote:<br><br>><br>> Hi All,<br>><br>> I am trying to bring up MPC8548 CDS board on
2.4 kernel. I have<br>> problem in the head_e500.S. The "mtspr SRR0, r7; mtspr SRR1 r6"<br>> does not work for me. The content of R7 and R6 are not moved to<br>> SRR0 and SRR1. I am using the tool-chain from Freescale for
2.6<br>> kernel.<br>><br>> Any idea on this issue?<br><br>Just to check...how do you know it doesn't work?<br><br>Andy<br></blockquote></div><br>