<html><head><style type="text/css"><!-- DIV {margin:0px;} --></style></head><body><div style="font-family:times new roman, new york, times, serif;font-size:12pt"><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;">Hello all:<br><br>I would like to understand if there is a way to program the PCI interrupt pin register of MPC8540. I did look for this in the datasheet, but couldn't find any positive answer.<br><br>Currently, I am working in a set-up where MPC8540 is an agent, plugged into the PC host. <br>I couldn't get an IRQ for the card when plugged in some PCI slots, whereas in one of the slots I do see a non-zero value.<br><br>It would be great if you could help me understand the issue.<br><br>I am sorry if the question is inapporpriate in the group. I am desperate to solve the issue.<br><br>Thanks for any help.<br>J.Joseph<br><br><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;">----- Original Message
----<br>From: Kumar Gala <galak@kernel.crashing.org><br>To: Wang Matthew-R59995 <Qi.W@freescale.com><br>Cc: linuxppc-embedded@ozlabs.org<br>Sent: Wednesday, 18 October, 2006 6:54:24 PM<br>Subject: Re: Linuxppc-embedded Digest, Vol 26, Issue 36<br><br><div><br>On Oct 18, 2006, at 8:10 PM, Wang Matthew-R59995 wrote:<br><br>> Hi Kumar,<br>><br>> Actually I do many trials about it. Vxwerks Bootrom is smaller than<br>> U-Boot. The key difference between Bootrom and U-boot is that some<br>> source code of Bootrom is invisible to the users.<br>><br>> Actually the rfi instruction which I point out is the first rfi<br>> instruction of Linux PowerPC bringup.<br>><br>> Before that, it's TLB entry invalidation and temp TLB entry mapping.<br>><br>> I check MMU setting carefully before coming Linux Kernel.<br>><br>> I just want to know if other guys met similar scenario like me. I <br>> don't<br>> need the precise
answer, just overall suggestion about it because I<br>> understand that not everyone has the same bootloader of mine, that<br>> bootloader is actually a customized bootloader.<br><br>I understand that, thus I was asking what exact problem you were <br>seeing to try and help.<br><br>> Anyway thank you.<br>><br>> R9 point to LR register, mask the high 20 bit of r9 and send to r7, <br>> and<br>> then add 24, which means stride 6 instructions for rfi instruction<br>> execution.<br>><br>> Of course, rfi can switch the TLB entry, both the previous TLB <br>> entry and<br>> the temp TLB entry point to the same physical address.<br>><br>> I've checked it.<br><br>I know what the code does, I wrote it :)<br><br>- kumar<br><br><br><br>_______________________________________________<br>Linuxppc-embedded mailing list<br>Linuxppc-embedded@ozlabs.org<br><a target="_blank"
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