According to the Lite5200B schematic <a href="http://www.freescale.com/files/32bit/hardware_tools/schematics/lite5200BSCH.pdf">http://www.freescale.com/files/32bit/hardware_tools/schematics/lite5200BSCH.pdf</a><br><br>PSC2_4 is tied to a signal called PWR_DN_CTL_STS via a zero ohm resistor R88. If you want to use PSC2_4 as something else you probably need to remove R88.
<br><br><div><span class="gmail_quote">On 12/15/06, <b class="gmail_sendername">John Rigby</b> <<a href="mailto:jcrigby@gmail.com">jcrigby@gmail.com</a>> wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
<span class="q">Have you looked at the Lite5200B schematic to see where the signals in
question go? Maybe you trying to drive something tied to ground high
or vice-versa.<br><br></span><div><span class="q"><span class="gmail_quote">On 12/15/06, <b class="gmail_sendername">Pedro Luis D. L.</b> <<a href="mailto:carcadiz@hotmail.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">
carcadiz@hotmail.com</a>> wrote:</span></span><div><span class="e" id="q_10f88f609c37664c_3"><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
Hi all,<br><br>I not pretty sure if this is the correct forum to ask for a solution but I<br>know that some of you have worked on a driver to make PSCs in this board<br>work in an I2S mode.<br><br>Have you ever have powerfail problems when writing the configuration
<br>registers for this mode?<br><br>I´ve delimited the problem:<br>- GPIO Port Config register stores without problems the value "111" in bits<br>25:27 (PSC2 to work in CODEC2 functionality with MCLK).<br>- When I write a "1" in PSC2->SICR register bit GenClk to ensure that clock
<br>and FrameSync are generated internally from MCLK the systems suffers a<br>powerfail and I suppose that´s consecuence or some kind of shortcircuit.<br>I´ve followed the same steps made by Bob Peterson in<br><a href="http://ozlabs.org/pipermail/linuxppc-embedded/2005-September/020210.html" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">
http://ozlabs.org/pipermail/linuxppc-embedded/2005-September/020210.html</a><br>to write the configuration in the proper registers but I still suffer the<br>powerfail when GenClk is activated or, if I activate that bit first, when
<br>Port Config is written.<br>I´m also trying to understand how things are done in Roman Fietze driver but<br>can´t find a difference. That makes me think that perhaps other registers<br>must be modificated before driver loading. Meanwhile, I keep waiting for
<br>Grant Likely release, :-).<br>Has this happened to someone before?<br><br>Thanks for your help.<br><br> Pedro.<br><br>_________________________________________________________________<br>Horóscopo, tarot, numerología... Escucha lo que te dicen los astros.
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