;bdiGDB configuration file for IBM 440EP Reference Board
; ------------------------------------------------------
;
; SDRAM setup based on boot ROM settings
;
[INIT]
;


[TARGET]
JTAGCLOCK   0                   ;use 16 MHz JTAG clock
CPUTYPE     440 		;the used target CPU type
SCANMISC    8                   ;IR length is 8 bits for 440GX/440EP
WAKEUP      500                  ;wakeup time after reset
STARTUP     RUN
BREAKMODE   SOFT      	        ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE    JTAG                ;JTAG or HWBP, HWBP uses one or two hardware breakpoints


[HOST]
IP          192.168.7.88
;FILE        E:\cygwin\home\demo\mpc860\fibo.elf
FORMAT      ELF
DUMP        E:\temp\dump.bin
PROMPT      440EP>


[FLASH]


[REGS]
IDCR1	0x010	0x011	;SDRAM0_CFGADDR and SDRAM0_CFGDATA
IDCR2	0x012	0x013	;EBC0_CFGADDR   and EBC0_CFGDATA
IDCR3	0x014	0x015	;EBM0_CFGADDR   and EBM0_CFGDATA
IDCR4	0x016	0x017	;PPM0_CFGADDR   and PPM0_CFGDATA
IDCR5	0x00C	0x00D	;CPR0_CFGADDR   and CPR0_CFGDATA
IDCR6	0x00E	0x00F	;SDR0_CFGADDR   and SDR0_CFGDATA
DMM1    0xC0600000      ;Peripheral (should map to 0_EF60_0000)
FILE    $reg440ep.def