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<DIV><FONT face=Arial size=2>We have an AIC26 <SPAN
class=780381522-07062006>codec </SPAN>connected to our Lite5200B platform via
J21. I've used MPC5200BUG to configure PSC3 as an SPI master, along with
some samples I've found online <SPAN class=780381522-07062006>(including
here) </SPAN>and <SPAN class=780381522-07062006>some I </SPAN>received from
Freescale. Although the transfers seem to be working as expected (please
see the <SPAN class=780381522-07062006>output file at the end of this
message</SPAN>), I get only 0xffff back. This occurs whether or not the
device is attached to J21. A scope shows that PSC3_8 (SPI_SS) and PSC3_9
(SPI_CLK) are low at all times, and I'm concerned I'm still doing something
wrong with respect to enabling SPI over PSC3. </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>I'm <SPAN class=780381522-07062006>including
</SPAN>my driver initialization code, my write code, and output showing the
write behavior. If someone could comment on it, I would greatly appreciate
it.<SPAN class=780381522-07062006>.. or if someone flat out has code to do
this, I'd be happy to take it from you. I've seen a few variations, but
whether I use them directly or modify them as I need to, I can't seem to
get past this. Of course, any other suggestions are
welcome.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Thanks.<BR>Sal</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial
size=2>---------------------------------------------------------------------------<BR>Initialization
Code<BR>---------------------------------------------------------------------------<BR>#define
GPIO_PSC3_PORT_CONFIG_MASK 0x00000f00<BR>#ifdef SPI_USE_MCLK<BR>
#define GPIO_PSC3_PORT_CONFIG 0x00000700 /*
PSC3 mode with mclk */<BR>#else /* SPI_USE_MCLK */<BR>
#define GPIO_PSC3_PORT_CONFIG 0x00000600 /*
PSC3 mode */<BR>#endif /* SPI_USE_MCLK */</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>#define
CDM_PSC3_MCLK_ENABLE 0x00000080<BR>#define
CDM_PSC3_MCLK_CONFIG 0x8020 /* Divide Fvco ftom
528 to
<BR>
16Mhz */</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>#define
PSC3_SICR_REG_VALUE 0x0280f000 /* 16-bit select Codec SPI
<BR>
master mode, msb first,
<BR>
UseEOF=1. GenClk=1, SIM,
<BR>
CPOL and CPHA are
<BR>
function input */
<BR>...
<BR> /* Select the Pin-Muxing for PSC3 Codec mode */<BR>
gpio = (struct mpc52xx_gpio *) ioremap(MPC52xx_GPIO,<BR>
sizeof(struct mpc52xx_gpio));<BR> if(gpio)<BR>
{<BR> port_config =
gpio->port_config;<BR> port_config &=
~GPIO_PSC3_PORT_CONFIG_MASK;<BR> port_config |=
GPIO_PSC3_PORT_CONFIG;<BR> gpio->port_config =
port_config;<BR> iounmap(gpio);<BR>
}<BR> else<BR> {<BR>
return(-1);<BR> }</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>#ifdef SPI_USE_MCLK<BR> /* PSC clock
enable */<BR> g_pCDM->clk_enables |=
CDM_PSC3_MCLK_ENABLE;<BR> g_pCDM->mclken_div_psc3 =
CDM_PSC3_MCLK_CONFIG;<BR>#endif /* SPI_USE_MCLK */</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2> /* Disable rx and tx
*/<BR> g_pPSC->command = MPC52xx_PSC_RST_RX;<BR>
g_pPSC->command = MPC52xx_PSC_RST_TX;<BR> g_pPSC->command =
MPC52xx_PSC_SEL_MODE_REG_1;<BR> g_pPSC->command =
MPC52xx_PSC_RST_ERR_STAT;<BR> g_pPSC->command =
MPC52xx_PSC_RX_DISABLE | MPC52xx_PSC_TX_DISABLE; </FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2> g_pPSC->mode = 0;<BR>
g_pPSC->sicr = PSC3_SICR_REG_VALUE;</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2> #ifdef SPI_USE_MCLK<BR>
g_pPSC->ccr=0x0703; /* set SCK and DSCKL
delay */<BR> #else /* SPI_USE_MCLK */<BR>
g_pPSC->ccr=0x0003; /* set SCK and DSCKL
delay must be > 2 */<BR> #endif /* SPI_USE_MCLK */</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>
g_pPSC->ctur=0x00; /* Set DTL delay
2us */<BR> g_pPSC->ctlr=0x84;</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>
g_pPSC->rfalarm=100; /* Alarm values taken from
SPI example sample */<BR> g_pPSC->tfalarm=1;</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2> g_pPSC->rfcntl &=
0xf8; /* 0 byte granularity
*/<BR> g_pPSC->tfcntl = 1;</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2> /* Enable rx & tx
*/<BR> g_pPSC->command = MPC52xx_PSC_RST_RX;<BR>
g_pPSC->command = MPC52xx_PSC_RST_TX;<BR> g_pPSC->command =
MPC52xx_PSC_SEL_MODE_REG_1;<BR> g_pPSC->command =
MPC52xx_PSC_RST_ERR_STAT;<BR> g_pPSC->command =
MPC52xx_PSC_RX_ENABLE | MPC52xx_PSC_TX_ENABLE; </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial
size=2>---------------------------------------------------------------------------<BR>Write
code<BR>---------------------------------------------------------------------------<BR>static
int mpc52xx_spi_transfer(u16 *p_usBuffer, u16 p_usCount)<BR>{<BR>
u16 usIndex, usTemp;</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>
printk("------------------------------------------------------\n");<BR>
printk("Entry: psc=%x
status=%04x tfstat=%04x rfstat=%04x mode=%02x\n tfnum %3d
rfnum %3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR> g_pPSC->command =
MPC52xx_PSC_RST_RX;<BR> g_pPSC->command =
MPC52xx_PSC_RST_TX;<BR> g_pPSC->command =
MPC52xx_PSC_SEL_MODE_REG_1;<BR> g_pPSC->command =
MPC52xx_PSC_RST_ERR_STAT;<BR> g_pPSC->command =
MPC52xx_PSC_RX_ENABLE | MPC52xx_PSC_TX_ENABLE;<BR> printk("TX-RX
Enable: psc=%x status=%04x tfstat=%04x rfstat=%04x mode=%02x\n
tfnum %3d rfnum %3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2> /* Clean out the read FIFO
*/<BR> usIndex = 0;<BR>
while(g_pPSC->mpc52xx_psc_status & MPC52xx_PSC_SR_RXRDY)<BR>
{<BR> usTemp =
g_pPSC->mpc52xx_psc_buffer_16;<BR>
printk("Flushing Rx FIFO: psc=%x status=%04x tfstat=%04x rfstat=%04x
mode=%02x\n tfnum %3d rfnum
%3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
usIndex++;<BR> if(usIndex == 10)
return(-1);<BR> }</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2> /* Send out the buffer
*/<BR> g_pPSC->command = MPC52xx_PSC_RX_ENABLE |
MPC52xx_PSC_TX_DISABLE;<BR> for(usIndex=0; usIndex<p_usCount;
usIndex++)<BR> {<BR> printk("Sending
%04x: psc=%x status=%04x tfstat=%04x rfstat=%04x mode=%02x\n
tfnum %3d rfnum %3d\n",<BR>
p_usBuffer[usIndex],
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR>
g_pPSC->mpc52xx_psc_buffer_16 =
p_usBuffer[usIndex];<BR>
printk("Sent: psc=%x
status=%04x tfstat=%04x rfstat=%04x mode=%02x\n tfnum %3d
rfnum %3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR> }<BR>
g_pPSC->command = MPC52xx_PSC_RX_ENABLE |
MPC52xx_PSC_TX_ENABLE;<BR> usTemp = 0;<BR>
while(g_pPSC->tfnum)<BR> {<BR>
printk("TFNUM Wait: psc=%x status=%04x tfstat=%04x rfstat=%04x
mode=%02x\n tfnum %3d rfnum
%3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
usTemp++;<BR> if(usTemp == 10)
return(-1);<BR> };<BR>
printk("TxRDY: psc=%x
status=%04x tfstat=%04x rfstat=%04x mode=%02x\n tfnum %3d
rfnum %3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR> for(usIndex=0;
usIndex<p_usCount; usIndex++)<BR>
{<BR> usTemp =
0;<BR> while(!(g_pPSC->mpc52xx_psc_status &
MPC52xx_PSC_SR_RXRDY))<BR>
{<BR> printk("RxRDY
Wait: psc=%x status=%04x tfstat=%04x rfstat=%04x
mode=%02x\n tfnum %3d rfnum
%3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum,
g_pPSC->rfnum);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
udelay(100000);<BR>
usTemp++;<BR> if(usTemp == 10)
return(-1);<BR>
};<BR>
printk("RxRDY: psc=%x
status=%04x tfstat=%04x rfstat=%04x mode=%02x\n tfnum %3d
rfnum %3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR>
p_usBuffer[usIndex] =
g_pPSC->mpc52xx_psc_buffer_16;<BR>
printk(" Received %04x\n", p_usBuffer[usIndex]);<BR>
}</FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2>
printk("EXIT: psc=%x
status=%04x tfstat=%04x rfstat=%04x mode=%02x\n tfnum %3d
rfnum %3d\n",<BR>
(int)g_pPSC,g_pPSC->mpc52xx_psc_status,g_pPSC->tfstat,g_pPSC->tfstat,g_pPSC->mode,<BR>
g_pPSC->tfnum, g_pPSC->rfnum);<BR>
return(usIndex);<BR>}</FONT></DIV>
<DIV> </DIV><FONT face=Arial size=2>
<DIV><BR>---------------------------------------------------------------------------<BR>Output<BR>---------------------------------------------------------------------------<BR>The
lines below are a capture of register settings from my driver,<BR>along with
output lines when trying to write 16 bit words to our<BR>device. This
output is consistent whether the device is connected<BR>or not (via J21).
Basic operation, delimited by "------...---":</DIV>
<DIV> </DIV>
<DIV> - Disable TX, Enable RX (despite the "TX-RX Enable"
heading)<BR> - Send word 1<BR> - Send word 2<BR> - Enable TX,
Enable RX<BR> - Wait for tfnum == 0<BR> - Receive
data<BR> <BR>port_config=91051624 sicr=0280f000 clk_enables=00ffffff
div_psc3=800f<BR>------------------------------------------------------<BR>Entry:
psc=f0002400 status=0400 tfstat=0003 rfstat=0003 mode=33<BR>
tfnum 0 rfnum 0<BR>TX-RX Enable:
psc=f0002400 status=0400 tfstat=0003 rfstat=0003 mode=33<BR>
tfnum 0 rfnum 0<BR>Sending 0880:
psc=f0002400 status=0400 tfstat=0003 rfstat=0003 mode=07<BR>
tfnum 0 rfnum
0<BR>Sent: psc=f0002400
status=0000 tfstat=0002 rfstat=0002 mode=07<BR> tfnum
2 rfnum 0<BR>Sending bb00: psc=f0002400 status=0000
tfstat=0002 rfstat=0002 mode=07<BR> tfnum 2
rfnum
0<BR>Sent: psc=f0002400
status=0000 tfstat=0002 rfstat=0002 mode=07<BR> tfnum
4 rfnum 0<BR>TFNUM Wait: psc=f0002400 status=0000
tfstat=0002 rfstat=0002 mode=07<BR> tfnum 2
rfnum 0<BR>TxRDY:
psc=f0002400 status=0500 tfstat=0003 rfstat=0003 mode=07<BR>
tfnum 0 rfnum
4<BR>RxRDY: psc=f0002400
status=0500 tfstat=0003 rfstat=0003 mode=07<BR> tfnum
0 rfnum 4<BR> Received
ffff<BR>RxRDY: psc=f0002400
status=0500 tfstat=0003 rfstat=0003 mode=07<BR> tfnum
0 rfnum 2<BR> Received
ffff<BR>EXIT: psc=f0002400
status=0400 tfstat=0003 rfstat=0003 mode=07<BR> tfnum
0 rfnum
0<BR>------------------------------------------------------<BR>Entry:
psc=f0002400 status=0400 tfstat=0003 rfstat=0003 mode=07<BR>
tfnum 0 rfnum 0<BR>TX-RX Enable:
psc=f0002400 status=0400 tfstat=0003 rfstat=0003 mode=33<BR>
tfnum 0 rfnum 0<BR>Sending 8820:
psc=f0002400 status=0400 tfstat=0003 rfstat=0003 mode=07<BR>
tfnum 0 rfnum
0<BR>Sent: psc=f0002400
status=0000 tfstat=0002 rfstat=0002 mode=07<BR> tfnum
2 rfnum 0<BR>Sending 0000: psc=f0002400 status=0000
tfstat=0002 rfstat=0002 mode=07<BR> tfnum 2
rfnum
0<BR>Sent: psc=f0002400
status=0000 tfstat=0002 rfstat=0002 mode=07<BR> tfnum
4 rfnum 0<BR>TFNUM Wait: psc=f0002400 status=0000
tfstat=0002 rfstat=0002 mode=07<BR> tfnum 2
rfnum 0<BR>TxRDY:
psc=f0002400 status=0500 tfstat=0003 rfstat=0003 mode=07<BR>
tfnum 0 rfnum
4<BR>RxRDY: psc=f0002400
status=0500 tfstat=0003 rfstat=0003 mode=07<BR> tfnum
0 rfnum 4<BR> Received
ffff<BR>RxRDY: psc=f0002400
status=0500 tfstat=0003 rfstat=0003 mode=07<BR> tfnum
0 rfnum 2<BR> Received
ffff<BR>EXIT: psc=f0002400
status=0400 tfstat=0003 rfstat=0003 mode=07<BR> tfnum
0 rfnum 0</FONT></DIV></BODY></HTML>