Morris,<br><br>A long time ago, I did this for a 405 and it involves much more than just changing the page shift.<br><br>From my memory, I will give you what I think you have to do.<br>1)you must go into tlb handling code and change it. That is in the
<br>header file 44x.S i beleive.<br>2)You have to change the pte directory sizes<br>3)You have to chage the linker script.<br>4)You have to change the size of the zero page.<br>5)you have to chage dcache flush routines, to cover the new page size.
<br>You have to find where 4096/4095 is hard coded as the page size and change it.<br><br>This is no small job, and what you come up with will be very unsupported.<br>I beleive If you pin the kerel TLB you might get <br>
the performance you need and this should be in the kernel config scripts.<br><br>Good luck, <br><br>Chip<br><br><div><span class="gmail_quote">On 5/1/06, <b class="gmail_sendername">moris dong</b> <<a href="mailto:moris_dong@hotmail.com">
moris_dong@hotmail.com</a>> wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">Friends,<br>My PPC440 (32bit) MMU supports multiple page sizes.
<br>For the default 4K pages, my 2.6.11 kernel compiles and boots just fine.<br>I want to re-build it with large pages, to improve my application<br>performance.<br>I tried modifying PAGE_SHIFT in "page.h" to 13 (8K pages) and re-build my
<br>kernel.<br>Compilation worked out fine, but my kernel does NOT boot, nor it prints<br>anything to the console.<br><br>Has anyone successfully compiled & booted a 2.6 kernel with pages larger<br>than 4K ?<br>What am I doing wrong ?
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