[K42-discussion] [Openfpga] Re: [Fastos] C-To-FPGA

Pedro Diniz pedro at ISI.EDU
Thu Oct 26 20:18:57 EST 2006


Hi,

Yes, it has been tried recently we, Mary Hall, John Granacki and I were
involved in a large research project to use parallelizing compilation  
techniques
to attempt this. Overall we were successful in many respects but from  
an industrial
perspective (possibly myopic) having a 40% slowdown in the generated  
FPGA solution
was always deemed as a non-starter. Yes, like everybody else we  
focused on the "right"
subset of C which does not include pointers or very unstructured  
control flow or even
procedure call. Many of these limitations were simply due to the lack  
of funding, the pointer
limitation was due to the limitations of the current implementation  
of pointer analysis, etc.

More stuff about this from the DEFACTO project or just do a google  
with "DEFACTO", or simply
e-mail me and I can make the relevant papers available.

Best,

Pedro Diniz


On Oct 20, 2006, at 4:38 PM, Timothy Miller wrote:

> On 10/20/06, Ronald G Minnich <rminnich at lanl.gov> wrote:
>>
>> > Timothy Miller wrote :
>> >
>> >
>> >>This is a long-term sort of project idea for us.  The holy grail  
>> would
>> >>be to convert arbitrary C or Fortran code into FPGA logic.  (This
>> >>would be especially good for Cray computers that arrange  
>> Opterons with
>> >>Xilinx FPGAs.)
>>
>> That Cray product is dead. "arbitrary C or fortran" is a holy  
>> grail, has
>> been tried many times, I hope you have done a literature search.  
>> It may
>> be a holy grail, that does not mean it is a good idea.
>
> I have not.  Academically, AI is my main area of research.  I have
> friends who are in this area whom I talk with about this a lot.  They
> would have done the literature searches.
>
>>  >>  A more realistic goal, however, would be to convert a
>> >>restricted subset of C into gates.
>>
>> ditto. literature search. start ca. 1990, with the dbC to fpga  
>> compiler
>> work.
>>
>> ron
>>
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